Detailed instructions for use are in the User's Guide.
[. . . ] 1. 0
SDXC Card series
64GB Extended Capacity Secure Digital Card
After power up (including hot insertion, i. e. inserting a card when the bus is operating) the SD Card enters the idle state. In case of SPI host, CMD0 shall be the first command to send the card to SPI mode.
CMD8 is added in the Physical Layer Specification Version 2. 00 to support multiple voltage ranges and used to check whether the card supports supplied voltage. The version 3. 00 host shall issue CMD8 and verify voltage before card initialization. [. . . ] The following sections describe the CSD fields and the relevant data types for the High Capacity SD Memory Card. The field name in parenthesis is set to fixed value and indicates that the host is not necessary to refer these fields. The fixed values enables host, which refers to these fields, to keep compatibility to CSD Version 1. 0. The Cell Type field is coded as follows: R = readable, W(1) = writable once, W = multiple writable.
Name CSD structure reserved data read access-time Field CSD_STRUCTURE (TAAC) 16 Width Value 2 6 8 01b 00 0000b 0Eh Cell Type CSD-slice R R R [127:126] [125:120] [119:112]
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Rev. read data block length (TRAN_SPEED) CCC (READ_BL_LEN)
64GB Extended Capacity Secure Digital Card
8 8 12 4 1
00h
R
[111:104] [103:96] [95:84] [83:80] [79:79] [78:78] [77:77] [76:76] [75:70] [69:48] [47:47] [46:46] [45:39] [38:32] [31:31] [30:29] [28:26] [25:22] [21:21] [20:16] [15:15] [14:14] [13:13] [12:12] [11:10]
32h, 5Ah, 0Bh or 2Bh R
01x110110101b 9 0 0 0 x 00 0000b xxxxxxh 0 1 7Fh 0000000b 0 00b 010b 9 0 00000b 0 x x x 00b
R R R R R R R R R R R R R R R R R R R R/W(1) R/W(1) R/W R
partial blocks for read allowed (READ_BL_PARTIAL) write block misalignment read block misalignment DSR implemented reserved device size reserved erase single block enable erase sector size write protect group size write protect group enable reserved write speed factor max. write data block length (R2W_FACTOR) (WRITE_BL_LEN)
(WRITE_BLK_MISALIGN) 1 (READ_BLK_MISALIGN) DSR_IMP C_SIZE (ERASE_BLK_EN) (SECTOR_SIZE) (WP_GRP_SIZE) (WP_GRP_ENABLE) 1 1 6 22 1 1 7 7 1 2 3 4 1 5 1 1
partial blocks for write allowed (WRITE_BL_PARTIAL) reserved File format group copy flag permanent write protection temporary write protection File format (FILE_FORMAT_GRP) COPY
PERM_WRITE_PROTECT 1 TMP_WRITE_PROTECT (FILE_FORMAT) 1 2
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SDXC Card series
reserved CRC not used, always'1' CRC -
64GB Extended Capacity Secure Digital Card
2 7 1
00b xxxxxxxb 1
R R/W -
[9:8] [7:1] [0:0]
The CSD Register Fields (CSD Version 2. 0)
The following sections describe the CSD fields and the relevant data types. If not explicitly defined otherwise, all bit strings are interpreted as binary coded numbers starting with the left bit first.
· CSD_STRUCTURE
Field structures of the CSD register are different depend on the Physical Specification Version and Card Capacity. The CSD_STRUCTURE field in the CSD register indicates its structure version. The following table shows the version number of the related CSD structure.
CSD_STRUCTURE 0 1 2-3
CSD structure version CSD Version 1. 0 CSD Version 2. 0 reserved
Card Capacity Standard Capacity High Capacity and Extended Capacity
CSD Register Structure
· TAAC
This field is fixed to 0Eh, which indicates 1 ms. The host should not use TAAC, NSAC, and R2W_FACTOR to calculate timeout and should uses fixed timeout values for read and write operations.
TAAC bit position code 2:0 time unit 0=1ns, 1=10ns, 2=100ns, 3=1µs, 4=10µs, 5=100µs, 6=1ms, 7=10ms
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6:3
64GB Extended Capacity Secure Digital Card
time value 0=reserved, 1=1. 0, 2=1. 2, 3=1. 3, 4=1. 5, 5=2. 0, 6=2. 5, 7=3. 0, 8=3. 5, 9=4. 0, A=4. 5, B=5. 0, C=5. 5, D=6. 0, E=7. 0, F=8. 0 reserved
7
· NSAC
This field is fixed to 00h. NSAC should not be used to calculate time-out values.
· TRAN_SPEED
The following table defines the maximum data transfer rate per one data line - TRAN_SPEED: TRAN_SPEED bit 2:0 code transfer rate unit 0=100kbit/s, 1=1Mbit/s, 2=10Mbit/s, 3=100Mbit/s, 4. . . 7=reserved time value 0=reserved, 1=1. 0, 2=1. 2, 3=1. 3, 4=1. 5, 5=2. 0, 6=2. 5, 7=3. 0, 8=3. 5, 9=4. 0, A=4. 5, B=5. 0, C=5. 5, D=6. 0, E=7. 0, F=8. 0 reserved
6:3
7
Maximum Data Transfer Rate Definition
Note that for current SD Memory Cards that field must be always 0_0110_010b (032h) which is equal to 25MHz - the mandatory maximum operating frequency of SD Memory Card. In High-Speed mode, that field must be always 0_1011_010b (05Ah) which is equal to 50MHz. And when the timing mode returns to the default by CMD6 or CMD0 command, its value will be 032h.
· CCC
The SD Memory Card command set is divided into subsets (command classes). The card command class register CCC defines which command classes are supported by this card. A value of `1' in a CCC bit means that the corresponding command class is supported.
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Rev. 11 class 11
64GB Extended Capacity Secure Digital Card
Supported card command class class 0 class 1
Supported Card Command Classes
· READ_BL_LEN
This field is fixed to 9h, which indicates READ_BL_LEN=512 Byte.
· READ_BL_PARTIAL
This field is fixed to 0, which indicates partial block read is inhibited and only unit of block access is allowed.
· WRITE_BLK_MISALIGN
This field is fixed to 0, which indicates that write access crossing physical block boundaries is always disabled in SDXC Cards.
· READ_BLK_MISALIGN
This field is fixed to 0, which indicates that read access crossing physical block boundaries is always disabled in SDXC Cards.
· DSR_IMP
Defines if the configurable driver stage is integrated on the card. If set, a driver stage register (DSR) must be implemented also
DSR_IMP 0 1
DSR type no DSR implemented DSR implemented
DSR Implementation Code Table
· C_SIZE
This field is expanded to 22 bits and can indicate up to 2 TBytes (It is the same as the maximum memory space
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SDXC Card series
64GB Extended Capacity Secure Digital Card
specified by a 32-bit block address. ) This parameter is used to calculate the user data area capacity in the SD memory card (not include the protected area). The user data area capacity is calculated from C_SIZE as follows: memory capacity = (C_SIZE+1) * 512K byte The Minimum user area size of SDHC Card is 4, 211, 712 sectors (2GB + 8. 5MB). [. . . ] For ROM (Read Only) and OTP (One Time Programmable) types of the SD Memory Card, the security feature is optional.
· SD_BUS_WIDTHS
Describes all the DAT bus widths that are supported by this card. SD_BUS_WIDTHS Bit 0 Bit 1 Bit 2 Bit 3 Supported Bus Widths 1 bit (DAT0) reserved 4 bit (DAT0-3) reserved
SD Memory Card Supported Bus Widths
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64GB Extended Capacity Secure Digital Card
Since SD Memory Card shall support at least the two bus modes 1bit or 4bit width then any SD Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101").
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6. 0 Reliability and Durability
Temperature Operation: -25° / 85° C C
64GB Extended Capacity Secure Digital Card
Storage: -40° (168h) / 85° (500h) C C Junction temperature: max. [. . . ]