User manual TEXAS INSTRUMENTS TVP5150AM1 DATA MANUAL REV C

[. . . ] TVP5150AM1 Ultralow-Power NTSC/PAL/SECAM Video Decoder Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Literature Number: SLES209C November 2007 ­ Revised June 2010 TVP5150AM1 SLES209C ­ NOVEMBER 2007 ­ REVISED JUNE 2010 www. ti. com Contents 1 2 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1. 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] AVID Application 3. 14 Embedded Syncs Standards with embedded syncs insert SAV and EAV codes into the datastream at the beginning and end of horizontal blanking. These codes contain the V and F bits that also define vertical timing. The alignment of V and F to the line and field counter varies depending on the standard. The P bits are protection bits: P3 = V xor H P2 = F xor H P1 = F xor V P0 = F xor V xor H Table 3-4. EAV and SAV Sequence 8-BIT DATA D7 (MSB) Preamble Preamble Preamble Status word 1 0 0 1 D6 1 0 0 F D5 1 0 0 V D4 1 0 0 H D3 1 0 0 P3 D2 1 0 0 P2 D1 1 0 0 P1 D0 1 0 0 P0 Copyright © 2007­2010, Texas Instruments Incorporated Functional Description Submit Documentation Feedback Product Folder Link(s): TVP5150AM1 23 TVP5150AM1 SLES209C ­ NOVEMBER 2007 ­ REVISED JUNE 2010 www. ti. com 3. 15 I2C Host Interface The I2C standard consists of two signals, serial input/output data line (SDA) and input/output clock line (SCL), which carry information between the devices connected to the bus. Although the I2C system can be multimastered, the TVP5150AM1 decoder functions only as a slave device. Both SDA and SCL must be connected to a positive supply voltage via a pullup resistor. The slave address select terminal (I2CSEL) enables the use of two TVP5150AM1 decoders tied to the same I2C bus. Depending on the write and read addresses to be used for the TVP5150AM1 decoder, it can either be pulled low or high through a resistor. This terminal is multiplexed with YOUT7 and hence must not be tied directly to ground or IO_DVDD. Table 3-6 summarizes the terminal functions of the I2C-mode host interface. Write Address Selection I2CSEL 0 1 WRITE ADDRESS B8h BAh Table 3-6. I2C Terminal Description SIGNAL I2CSEL (YOUT7) SCL SDA TYPE I I/O (open drain) I/O (open drain) DESCRIPTION Slave address selection Input/output clock line Input/output data line Data transfer rate on the bus is up to 400 kbit/s. The number of interfaces connected to the bus is dependent on the bus capacitance limit of 400 pF. The data on the SDA line must be stable during the high period of the SCL except for start and stop conditions. The high or low state of the data line can only change with the clock signal on the SCL line being low. A high-to-low transition on the SDA line while the SCL is high indicates an I2C start condition. A low-to-high transition on the SDA line while the SCL is high indicates an I2C stop condition. The acknowledge-related clock pulse is generated by the I2C master. 24 Functional Description Submit Documentation Feedback Product Folder Link(s): TVP5150AM1 Copyright © 2007­2010, Texas Instruments Incorporated TVP5150AM1 www. ti. com SLES209C ­ NOVEMBER 2007 ­ REVISED JUNE 2010 3. 15. 1 I2C Write Operation Data transfers occur utilizing the following illustrated formats. An I2C master initiates a write operation to the TVP5150AM1 decoder by generating a start condition (S) followed by the TVP5150AM1 I2C slave address (see the following illustration), in MSB first bit order, followed by a 0 to indicate a write cycle. After receiving an acknowledge from the TVP5150AM1 decoder, the master presents the subaddress of the register, or the first of a block of registers it wants to write, followed by one or more bytes of data, MSB first. The TVP5150AM1 decoder acknowledges each byte after completion of each transfer. [. . . ] OTHER QUALIFIED VERSIONS OF TVP5150AM1 : · Enhanced Product: TVP5150AM1-EP NOTE: Qualified Version Definitions: · Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. [. . . ]