User manual TEXAS INSTRUMENTS TUSB9260 DATA MANUAL REV C

[. . . ] TUSB9260 USB 3. 0 TO SATA BRIDGE Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Literature Number: SLLS962C December 2009 ­ Revised July 2010 TUSB9260 SLLS962C ­ DECEMBER 2009 ­ REVISED JULY 2010 www. ti. com Contents 1 2 3 4 5 6 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1. 1 TUSB9260 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] It is powered down when it is below that range, either stable or in transition. This is defined as the time when the power supplies are in the recommended operating range to the de-assertion of GRSTz. 10 OPERATION Submit Documentation Feedback Product Folder Link(s): TUSB9260 Copyright © 2009­2010, Texas Instruments Incorporated TUSB9260 www. ti. com SLLS962C ­ DECEMBER 2009 ­ REVISED JULY 2010 4 SIGNAL DESCRIPTIONS Table 4-1. I/O Definitions I/O TYPE I O I/O PU PD PWR Input Output Input - Output Internal pull-up resistor Internal pull-down resistor Power signal DESCRIPTION Table 4-2. This reset brings all of the TUSB9260 internal registers to their default states. The input may alternately be driven by the output of an external oscillator. When using a crystal a 1-M feedback resistor is required between X1 and XO. If XI is driven by an external oscillator this pin may be left unconnected. When using a crystal a 1-M feedback resistor is required between X1 and XO. These terminals indicate the oscillator input frequency and are used to configure the correct PLL multiplier. The field encoding is as follows: FREQSEL[1] FREQSEL[1:0] 31, 30 I PU 0 0 1 1 FREQSEL[0] 0 1 0 1 INPUT CLOCK FREQUENCY Reserved Reserved Reserved 40 MHz XO 54 O Table 4-3. SATA Interface Signals TERMINAL NAME SATA_TXP SATA_TXM SATA_RXP SATA_RXM PIN NO. 57 56 60 59 I/O O O I I DESCRIPTION Serial ATA transmitter differential pair (positive) Serial ATA transmitter differential pair (negative) Serial ATA receiver differential pair (positive) Serial ATA receiver differential pair (negative) Copyright © 2009­2010, Texas Instruments Incorporated SIGNAL DESCRIPTIONS Submit Documentation Feedback Product Folder Link(s): TUSB9260 11 TUSB9260 SLLS962C ­ DECEMBER 2009 ­ REVISED JULY 2010 www. ti. com Table 4-4. USB Interface Signals TERMINAL NAME USB_SSTXP USB_SSTXM USB_SSRXP USB_SSRXM USB_DP USB_DM USB_VBUS USB_R1 USB_R1RTN PIN NO. 43 42 46 45 36 35 33 39 40 I/O O O I I I/O I/O I O I DESCRIPTION USB SuperSpeed transmitter differential pair (positive) USB SuperSpeed transmitter differential pair (negative) USB SuperSpeed receiver differential pair (positive) USB SuperSpeed receiver differential pair (negative) USB High-speed differential transceiver (positive) USB High-speed differential transceiver (negative) USB bus power Precision resistor reference. Serial Peripheral Interface (SPI) Signals TERMINAL NAME SPI_SCLK SPI_DATA_IN SPI_DATA_OUT SPI_CS0 SPI_CS2/ GPIO11 SPI_CS1/ GPIO10 PIN NO. 17 18 20 21 23 22 I/O O PU I PU O PU O PU I/O PU I/O PU DESCRIPTION SPI clock SPI master data in SPI master data out Primary SPI chip select for Flash RAM SPCI chip select for additional peripherals. When not used for SPI chip select this pin may be used as general purpose I/O. When not used for SPI chip select this pin may be used as general purpose I/O. 12 SIGNAL DESCRIPTIONS Submit Documentation Feedback Product Folder Link(s): TUSB9260 Copyright © 2009­2010, Texas Instruments Incorporated TUSB9260 www. ti. com SLLS962C ­ DECEMBER 2009 ­ REVISED JULY 2010 Table 4-6. JTAG, GPIO, and PWM Signals TERMINAL NAME JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRSTz GPIO9/UART_TX GPIO8/UART_RX GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 PWM0 PWM1 (1) PIN NO. 25 26 27 28 29 6 5 16 15 14 13 11 10 9 8 2 3 I/O I PD I PU O PD I PU I PD I/O PU I/O PU I/O PD I/O PD I/O PD I/O PD I/O PD I/O PD I/O PD I/O PD O PD (1) O PD (1) DESCRIPTION JTAG test clock JTAG test data in JTAG test data out JTAG test mode select JTAG test reset GPIO/UART transmitter. This terminal can be configured as a GPIO or as the transmitter for a UART channel. This terminal can be configured as a GPIO or as the receiver for a UART channel. [. . . ] In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. [. . . ]