User manual TEXAS INSTRUMENTS TMS320F28067 ADVANCE INFORMATION

[. . . ] TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 www. ti. com SPRS698A ­ NOVEMBER 2010 ­ REVISED JANUARY 2011 Piccolo Microcontrollers Check for Samples: TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 1 TMS320F2806x ( PiccoloTM) MCUs 1. 1 123 Features · Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts · Three 32-Bit CPU Timers · Advanced Control Peripherals · Up to 8 Enhanced Pulse Width Modulator (ePWM) Modules ­ 16 PWM Channels Total (8 HRPWM-Capable) ­ Independent 16-Bit Timer in Each Module · 3 Input Capture (eCAP) Modules · 4 High-Resolution Input Capture (HRCAP) Modules · 2 Quadrature Encoder (eQEP) Modules · 12-Bit ADC, Dual Sample-and-Hold ­ Up to 3 MSPS ­ Up to 16 Channels · On-Chip Temperature Sensor · 128-Bit Security Key/Lock ­ Protects Secure Memory Blocks ­ Prevents Firmware Reverse Engineering · Serial Port Peripherals ­ Up to Two Serial Communications Interface (SCI) [UART] Modules ­ Two Serial Peripheral Interface (SPI) Modules ­ One Inter-Integrated-Circuit (I2C) Bus ­ One Multi-Channel Buffered Serial Port (McBSP) Bus ­ One Enhanced Controller Area Network (eCAN) · Up to 54 Individually Programmable, Multiplexed GPIO Pins With Input Filtering · Advanced Emulation Features ­ Analysis and Breakpoint Functions ­ Real-Time Debug via Hardware · 2806x Packages ­ 80-Pin PFP and 100-Pin PZP PowerPADTM Low-Profile Quad Flatpacks (LQFPs) ­ 80-Pin PN and 100-Pin PZ LQFPs · High-Efficiency 32-Bit CPU (TMS320C28xTM) ­ 80 MHz (12. 5-ns Cycle Time) ­ 16 x 16 and 32 x 32 MAC Operations ­ 16 x 16 Dual MAC ­ Harvard Bus Architecture ­ Atomic Operations ­ Fast Interrupt Response and Processing ­ Unified Memory Programming Model ­ Code-Efficient (in C/C++ and Assembly) · Floating-Point Unit ­ Native Single-Precision Floating-Point Operations · Programmable Control Law Accelerator (CLA) ­ 32-Bit Floating-Point Math Accelerator ­ Executes Code Independently of the Main CPU · Viterbi, Complex Math, CRC Unit (VCU) ­ Extends C28xTM Instruction Set to Support Complex Multiply, Viterbi Operations, and Cyclic Redundency Check (CRC) · Embedded Memory ­ Up to 256KB Flash ­ Up to 100KB RAM ­ 2KB OTP ROM · 6-Channel DMA · Low Device and System Cost ­ Single 3. 3-V Supply ­ No Power Sequencing Requirement ­ Integrated Power-on Reset and Brown-out Reset ­ Low-Power Operating Modes ­ No Analog Support Pin · Clocking ­ Two Internal Zero-pin Oscillators ­ On-Chip Crystal Oscillator/External Clock Input ­ Dynamic PLL Ratio Changes Supported ­ Watchdog Timer Module ­ Missing Clock Detection Circuitry 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Piccolo, PowerPAD, C28x, TMS320C2000, C2000, Code Composer Studio, XDS510, XDS560, TMS320C28x, TMS320C54x, TMS320C55x are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 2 3 ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Copyright © 2010­2011, Texas Instruments Incorporated ADVANCE INFORMATION TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698A ­ NOVEMBER 2010 ­ REVISED JANUARY 2011 www. ti. com 1. 2 Description The F2806x PiccoloTM family of microcontrollers provides the power of the C28xTM core and Control Law Accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. [. . . ] B. Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the device pin. For output timing analysis, the tester pin electronics and its transmission line effects must be taken into account. A transmission line with a delay of 2 ns or longer can be used to produce the desired transmission line effect. It is not necessary to add or subtract the transmission line delay (2 ns or longer) from the data sheet timing. Figure 6-1. 3. 3-V Test Load Circuit 60 Peripheral and Electrical Specifications Copyright © 2010­2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 www. ti. com SPRS698A ­ NOVEMBER 2010 ­ REVISED JANUARY 2011 6. 3 Device Clock Table This section provides the timing requirements and switching characteristics for the various clock options available on the 2806x MCUs. 2806x Clock Table and Nomenclature (80-MHz Devices) MIN NOM MAX 500 80 66. 67 (2) 15 (2) 16. 67 80 80 UNIT ns MHz ns MHz ns MHz tc(SCO), Cycle time Frequency tc(LCO), Cycle time Frequency tc(ADCCLK), Cycle time Frequency 16. 67 2 16. 67 SYSCLKOUT LSPCLK (1) ADC clock (1) (2) Lower LSPCLK will reduce device power consumption. Device Clocking Requirements/Characteristics tc(OSC), Cycle time Frequency tc(CI), Cycle time (C8) Frequency tc(CI), Cycle time (C8) Frequency Frequency range tc(XCO), Cycle time (C1) Frequency tp 66. 67 0. 5 50 5 33. 3 5 33. 33 4 1 to 5 2000 15 1 200 20 200 30 250 30 ns MHz ns MHz ns MHz MHz ns MHz ms On-chip oscillator (X1/X2 pins) (Crystal/Resonator) External oscillator/clock source (XCLKIN pin) -- PLL Enabled External oscillator/clock source (XCLKIN pin) -- PLL Disabled Limp mode SYSCLKOUT (with /2 enabled) XCLKOUT PLL lock time (1) (1) The PLLLOCKPRD register must be updated based on the number of OSCCLK cycles. If the zero-pin internal oscillators (10 MHz) are used as the clock source, then the PLLLOCKPRD register must be written with a value of 10, 000 (minimum). Copyright © 2010­2011, Texas Instruments Incorporated Peripheral and Electrical Specifications Submit Documentation Feedback Product Folder Link(s): TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 61 ADVANCE INFORMATION MIN NOM MAX UNIT TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698A ­ NOVEMBER 2010 ­ REVISED JANUARY 2011 www. ti. com Table 6-3. Internal Zero-Pin Oscillator (INTOSC1/INTOSC2) Characteristics PARAMETER Internal zero-pin oscillator 1 (INTOSC1) at 30°C (1) (2) Internal zero-pin oscillator 2 (INTOSC2) at 30°C (1) (2) Step size (coarse trim) Step size (fine trim) Temperature drift (3) Voltage (VDD) drift (3) (1) (2) (3) Frequency Frequency MIN TYP 10. 000 10. 000 55 14 3. 03 175 MAX UNIT MHz MHz kHz kHz 4. 85 kHz/°C Hz/mV In order to achieve better oscillator accuracy (10 MHz ± 1% or better) than shown, refer to the Oscillator Compensation Guide Application Report (literature number SPRAB84). Output frequency of the internal oscillators follows the direction of both the temperature gradient and voltage (VDD) gradient. For example: · Increase in temperature will cause the output frequency to increase per the temperature coefficient. · Decrease in voltage (VDD) will cause the output frequency to decrease per the voltage coefficient. Zero-Pin Oscillator Frequency Movement With Temperature ADVANCE INFORMATION 10. 6 10. 5 10. 4 Output Frequency (MHz) 10. 3 10. 2 10. 1 10 9. 9 9. 8 9. 7 9. 6 ­40 ­30 ­20 ­10 0 10 20 30 40 50 60 70 80 90 100 110 120 Typical Max Temperature (°C) Figure 6-2. Zero-Pin Oscillator Frequency Movement With Temperature 62 Peripheral and Electrical Specifications Copyright © 2010­2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 www. ti. com SPRS698A ­ NOVEMBER 2010 ­ REVISED JANUARY 2011 6. 4 Clock Requirements and Characteristics Table 6-4. C9 C10 C11 C12 tf(CI) tr(CI) tw(CIL) tw(CIH) Fall time, XCLKIN Rise time, XCLKIN Pulse duration, XCLKIN low as a percentage of tc(OSCCLK) Pulse duration, XCLKIN high as a percentage of tc(OSCCLK) MIN MAX 6 6 UNIT ns ns % % 45 45 55 55 Table 6-5. C9 C10 C11 C12 tf(CI) tr(CI) tw(CIL) tw(CIH) Fall time, XCLKIN Rise time, XCLKIN Pulse duration, XCLKIN low as a percentage of tc(OSCCLK) Pulse duration, XCLKIN high as a percentage of tc(OSCCLK) Up to 20 MHz 20 MHz to 30 MHz Up to 20 MHz 20 MHz to 30 MHz 45 45 MIN MAX 6 2 6 2 55 55 % % ns UNIT ns The possible configuration modes are shown in Table 3-18. XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) (1) (2) NO. C3 C4 C5 C6 (1) (2) tf(XCO) tr(XCO) tw(XCOL) tw(XCOH) Fall time, XCLKOUT Rise time, XCLKOUT Pulse duration, XCLKOUT low Pulse duration, XCLKOUT high H­2 H­2 H+2 H+2 PARAMETER MIN TYP MAX UNIT ns ns ns ns A load of 40 pF is assumed for these parameters. H = 0. 5tc(XCO) C10 C8 XCLKIN(A) C9 C1 C3 C4 C6 C5 XCLKOUT(B) A. B. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is intended to illustrate the timing parameters only and may differ based on actual configuration. Clock Timing Copyright © 2010­2011, Texas Instruments Incorporated Peripheral and Electrical Specifications Submit Documentation Feedback Product Folder Link(s): TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 63 ADVANCE INFORMATION TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698A ­ NOVEMBER 2010 ­ REVISED JANUARY 2011 www. ti. com 6. 5 Power Sequencing There is no power sequencing requirement needed to ensure the device is in the proper state after reset or to prevent the I/Os from glitching during power up/down. However, it is recommended that no voltage larger than a diode drop (0. 7 V) should be applied to any pin prior to powering up the device. [. . . ] In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. [. . . ]