User manual NEC MULTISYNC LCD1280

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Manual abstract: user guide NEC MULTISYNC LCD1280

Detailed instructions for use are in the User's Guide.

[. . . ] This symbol warns user that uninsulated voltage within the unit may have sufficient magnitude to cause electric shock. Therefore, it is dangerous to make any kind of contact with any part inside this unit. This symbol alerts the user that important literature concerning the operation and maintenance of this unit has been included. Therefore, it should be read carefully in order to avoid any problems. FCC Information The Federal Communications Commission Radio Frequency Interference Statement includes the following warning: Note: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the Contents Introduction Contents of Package Introduction to the NEC LCD1280 True Color Monitor Analog Interface Reduced Footprint Low Power Consumption ErgoDesignTM Reduced Emissions LCD1280 Specifications 1 1 1 1 1 2 2 2 3 5 5 5 7 7 7 7 Troubleshooting/Support Troubleshooting Chart Technical Support BBS FastFactsTM Warranty 9 9 10 10 10 10 13 13 14 14 17 17 18 18 Appendix 1 Pin Assignment Table Appendix 2 Signal Timings Installation Recommended Use Connection to Graphics Cards using BNC cables Front Controls Side Control Rear Controls Appendix 3 Signal Levels Controls References Index LCD1280, ErgoDesign, IPM, Reduced Magnetic Field, and FastFacts are trademarks of NEC Technologies, Inc. [. . . ] However, because the LCD1280 is a high resolution, full color analog monitor, it may require the use of a graphics card (sometimes referred to as a video card, video adapter or graphics board) that supports high resolution graphics (1280 x 1024), 24-bit color (16. 7M colors), delivers an analog output, and which has 5 1. Determine the pixel frequency (DOT clock) output and the SYNC method used by the graphics card or system. For more information, refer to the graphics card or system manual or the FastFacts document referred to above. Make sure the H-SEL switch on the rear of the panel is positioned to the appropriate pixel frequency (if you are not sure, refer to the board manual or documents). 1 2 H-SEL Pixel Frequency (DOT clock): H-SEL Mode 1 -- 107. 5 MHz H-SEL Mode 2 --- 107. 352 MHz 4. Make sure the SYNC switch on the rear of the panel is positioned to the appropriate mode. SYNC Input Mode: OFF -- Separate Sync/ Composite Sync ON -- Sync on Green OFF ON LCD1280 10/29/99 9:25 AM Page 6 Installation 5. When the power is on, the LED is lit. Rear Controls: Display Position / Clock Delay Adjust H-SEL Pixel Frequency Select 0 E C A 8 Sync Mode Select H-C H-V2 H-H2 H-H1 H-V1 V-H2 V-V2 V-C V-V1 V-H1 2 4 6 OFF SYNC ON H/CS VS R G/SYNC B SYNC Mode Select Switch: allows selection between Standard mode (OFF) and Sync on Green (ON) priority mode. H-SEL Pixel Frequency Select Switch: selects the external pixel clock source for WS timing 1 (107. 5 MHz) or WS timing 2 (107. 352 MHz). Rough WS Horizontal Adjust (H-H1): rough adjustment for horizontal position of WS mode (16 dot increment per operation). Fine WS Horizontal Adjust (H-H2): fine adjustment for horizontal position of WS mode (1 dot increment per operation). Rough WS Vertical Adjust (H-V1): rough adjustment for vertical position of WS mode (16 line increment per operation). Fine WS Vertical Adjust (H-V2): fine adjustment for vertical position of WS mode (1 line increment per operation). VGA Clock Delay Adjust (V-C): adjustment of VGA pixel clock delay rate. Rough VGA Horizontal Adjust (V-H1): rough adjustment for horizontal position of VGA mode (32 pixel / 16 dot increment per operation). 7 LCD1280 10/29/99 9:25 AM Page 7 Controls Fine VGA Horizontal Adjust (V-H2): fine adjustment for horizontal position of VGA mode (2 pixel / 1 dot increment per operation). Rough VGA Vertical Adjust (V-V1): rough adjustment for vertical position of VGA mode (32 pixel / 16 line increment per operation). Fine VGA Vertical Adjust (V-V2): fine adjustment for vertical position of VGA mode (2 pixel / 1 line increment per operation). 8 Troubleshooting/Support Problem No Picture Check These Items · · · · · The signal cable should be completely connected to the video card/computer. Check BNC connectors to make certain that each connector has been attached correctly. Check H-SEL Switch and SYNC Switch to make certain that they are in the correct position according to the Installation section of this manual. Image is unstable or swimming is apparent · Signal cable should be completely attached to the computer. · Check the monitor and your video card with respect to compatability and recommended signal timings (Please see FastFacts document #52301280 and Appendix 2). · Check the SYNC Switch and H-SEL Switch for their correct position. [. . . ] This Product is warranted in accordance with the terms of this limited warranty. Consumers are cautioned that Product performance is affected by system configuration, software, the application, customer data, and operator control of the system, among other factors. Products are considered to be compatible with many systems, the specific functional implementation by the customers of the Product may vary. Therefore, the suitability of a Product for a specific purpose or application must be determined by the customer and is not warranted by NECTECH. This warranty gives you specific legal rights, and you may also have other rights which vary from state to state. 12 Appendix 1 Pin Assignment Table For the Monitor: H/CS VS R G B BNC Number 1 2 3 4 5 Separate SYNC Composite SYNC Horizontal Composite SYNC Vertical No Connection Red Red Green Green Blue Blue Sync on Green No Connection No Connection Red Green with SYNC Blue For the Graphics Board: 1 6 11 12 2 7 3 8 4 9 5 10 15 A1 6 1 7 2 8 3 9 4 10 5 A2 A3 13 14 IBM VGA 15-pin mini D-Sub female 1 2 3 4 5 6 7 8 Red Video Green Video Blue Video Reserved Reserved Red Ground Green Ground Blue Ground 9 10 11 12 13 14 15 Reserved Digital Ground Reserved Reserved Horizontal SYNC Vertical SYNC Reserved A1 A2 A3 3 4 5 8 9 10 13W3 Male Red Video Green Video Blue Video Sense Code Return for Sense Code Composite Sync Sense Code Sense Code Sync Return 13 LCD1280 10/29/99 9:25 AM Page 10 Appendix 2 Signal Timings Input Signal Timings (WS High Resolution Mode) Item Pixel frequency Horizontal frequency Line Time total Horizontal active display Horizontal sync pulse Horizontal baack porch Horizontal front porch H-sync Rise & Fall Vertical frequency Frame time total Vertical active display Vertical sync pulse Vertical back porch Vertical front porch Abbreviation fc fh Th Thd Thp Thb Thf Thrf fv Tv Tvd Tvp Tvb Tvf Monitor Rating 107. 5MHz ± 50ppm 64. 60KHz 15. 479usec 11. 907usec 1. 786usec 1. 488usec 0. 298usec 5ns(max. ) 59. 93Hz 16. 686msec 15. 850msec 0. 062msec 0. 666msec 0. 108msec 1078H 1024H 4H 43H 7H 60. 0Hz 16. 667msec 16. 025msec 0. 047msec 0. 548msec 0. 047msec 1065H 1029H 3H 35H 3H 1664CLK 1280CLK 192CLK 160CLK 32CLK 9. 302nsec/pixel 107. 352HHz ± 50ppm 63. 9KHz 15. 649esec 11. 923usec 1. 118usec 2. 329usec 0. 279usec 1680CLK 1280CLK 120CLK 250CLK 30CLK 9. 315nsec/pixel IMPORTANT: The Jitter on Hsync output from video card should be less than 300 psec or you may see some jitter on the screen. 14 Input Signal Timings (VGA Mode) (The values of Front & Back porch are for reference only) Item Pixel frequency Horizontal frequency Line Time total Horizontal active display Horizontal sync pulse Horizontal back porch Horizontal front porch Vertical frequency Frame time total Vertical active display Vertical sync pulse Vertical back porch Vertical front porch Abbreviation fc fh Th Thd Thp Thb Thf fv Tv Tvd Tvp Tvb Tvf Monitor Rating 25. 175MHz ± 50ppm 31. 469KHz 31. 778usec 25. 422usec 3. 813usec 1. 907usec 0. 636usec 59. 94Hz 16. 683msec 15. 253msec 0. 063msec 1. 017msec 0. 350msec 525H 480H 2H 32H 15H 800CLK 640CLK 96CLK 48CLK 16CLK 39. 72nsec/pixel IMPORTANT: The Jitter on Hsync output from video card should be less than 300 psec or you may see some jitter on the screen. 15 LCD1280 10/29/99 9:25 AM Page 11 Appendix 2 H-Video V-Video Tvd Thd Horizontal Vertical Thp Thb Th Thf Tvp Tvb Tv Tvf Fig. [. . . ]

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