User manual FREESCALE MC13213

[. . . ] MC13211/212/213 ZigBeeTM- Compliant Platform 2. 4 GHz Low Power Transceiver for the ® 802. 15. 4 Standard plus Microcontroller IEEE Reference Manual Document Number: MC1321xRM Rev. 1. 3 04/2008 How to Reach Us: Home Page: www. freescale. com E-mail: support@freescale. com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale. com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale. com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064, Japan 0120 191014 or +81 3 5437 9125 support. japan@freescale. com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. [. . . ] This register can be written only once, so normally this write is done during reset initialization. FCDIV cannot be written if the access error flag, FACCERR in FSTAT, is set. The user must ensure that FACCERR is not set before writing to the FCDIV register. One period of the resulting clock (1/fFCLK) is used by the command processor to time program and erase pulses. An integer number of these timing pulses is used by the command processor to complete a program or erase command. The bus clock frequency and FCDIV determine the frequency of FCLK (fFCLK). The times are shown as a number of cycles of FCLK and as an absolute time for the case where tFCLK = 5 s. Program and erase times shown include overhead for the command state machine and enabling and disabling of program and erase voltages. MC1321x Reference Manual, Rev. Program and Erase Times Parameter Byte program Byte program (burst) Page erase Mass erase 1 Cycles of FCLK 9 4 4000 20, 000 Time if FCLK = 200 kHz 45 s 20 s1 20 ms 100 ms Excluding start/end overhead 11. 4. 3 Program and Erase Command Execution The steps for executing any of the commands are listed below. The FCDIV register must be initialized and any error flags cleared before beginning command execution. The address and data information from this write is latched into the FLASH interface. For erase and blank check commands, the value of the data is not important. For page erase commands, the address may be any address in the 512-byte page of FLASH to be erased. For mass erase and blank check commands, the address can be any address in the FLASH memory. Whole pages of 512 bytes are the smallest blocks of FLASH that may be erased. In the 60K version, there are two instances where the size of a block that is accessible to the user is less than 512 bytes: the first page following RAM, and the first page following the high page registers. These pages are overlapped by the RAM and high page registers, respectively. NOTE Do not program any byte in the FLASH more than once after a successful erase operation. Reprogramming bits in a byte which is already programmed is not allowed without first erasing the page in which the byte resides or mass erasing the entire FLASH memory. Programming without first erasing may disturb data stored in the FLASH. The five valid commands are blank check (0x05), byte program (0x20), burst program (0x25), page erase (0x40), and mass erase (0x41). Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its address and data information). [. . . ] For an end trace, CPU break requests are issued to the CPU when the comparator(s) and R/W meet the trigger requirements. For a begin trace, CPU break requests are issued when the FIFO becomes full. 0 CPU break requests not enabled 1 Triggers cause a break request to the CPU R/W Comparison Value for Comparator A -- When RWAEN = 1, this bit determines whether a read or a write access qualifies comparator A. 0 Comparator A can only match on a write cycle 1 Comparator A can only match on a read cycle Enable R/W for Comparator A -- Controls whether the level of R/W is considered for a comparator A match. [. . . ]