User manual ENCORE 536EPXX DATA SHEET

[. . . ] Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www. intel. com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. 2 Intel Confidential Preliminary Datasheet Host Accelerated Modem 56K V. 92 Chipset -- 536EPXX 1. 0 Overview The software upgradable 536EPXX chipset and reference design from Intel is targeted at modem and computer manufacturers. This new product is a leap forward in technology, performance and cost savings. [. . . ] Functional Block Diagrams (Continued) 536EPUS/GS/GL HOST COMPUTER PCI BUS DSP DQ82536 Silicon CODEC/DAA TIP RING MICROPHONE / SPEAKER AFE NVRAM MD1724 (OPTIONAL) (OPTIONAL) + 536EPAS HOST COMPUTER PCI BUS AFE MD1724 DAA TIP RING DSP DQ82536 MICROPHONE / SPEAKER AFE NVRAM MD1724 (OPTIONAL) (OPTIONAL) + 20 Intel Confidential PreliminaryDatasheet Host Accelerated Modem 56K V. 92 Chipset -- 536EPXX 6. 0 Chipset Descriptions The 536EPXX is a Host Accelerated Modem chipset family consisting of a DSP (digital signal processor), and a Silicon Laboratories CODEC/DAA or an Intel Analog Front End (AFE). These chipsets support a variety of applications and need no additional firmware development. The current 536EPXXchipsets are shown in Table 12 "Chipset Composition (PCI & Mini-PCI)" with their corresponding DSP and AFE device part numbers. Please contact Intel to verify current part numbers and technical information. 6. 1 Host Controller Software The host-based controller software contains code for all controller functions for Group 3 Fax mode, Data mode (including error correction and data compression), and Voice mode. 6. 1. 1 Digital Signal Processor (DSP) The DQ82536 digital signal processor (DSP) performs all digital signal processing functions for the chipset, including modulation, echo cancellation, call progress monitoring, and voice processing. The DSP requires a 3. 3 V and 1. 3 V power supply, which takes advantage of the latest manufacturing technologies. The PCI bus accommodates either 5-V or 3. 3-V designs reducing power consumption. 6. 2 Analog Front End Device (AFE) The MD1724 AFE device uses Delta-Sigma techniques to convert analog information from a telephone line to digital information that can be processed by the DSP. In addition to its analog circuitry, the modem's Delta-Sigma function incorporates unique and proprietary digital-to-analog and analog-to-digital features. These features improve receiver accuracy, which in turn improves performance at low levels of receive signal. Compared to other analog front-end technologies, the Delta-Sigma implementation better stabilizes the function of the AFE devices and makes them less sensitive to board layout than other analog front end technologies. Since a significant amount of signal processing is performed by digital rather than analog techniques, Delta-Sigma analog-to-digital conversion considerably improves signal quality. For basic data, fax, and voice modes of operation, a single AFE device is needed. For full-duplex echo cancelled speakerphone applications, an additional AFE device is required. The AFEs require a 5-V power supply; however, the interface is 3. 3-V­capable. 6. 3 CODEC/DAA The 536EPXX chipset uses a Silicon DAA to interface to the telephone line. The Silicon DAA replaces an analog front end (AFE), an isolation transformer, relays, opto-isolators and a hybrid. Preliminary Datasheet Intel Confidential 21 536EPXX -- Host Accelerated Modem 56K V. 92 Chipset 7. 0 Modes of Operation The 536EPXX chipset family provides complete modem functions for the following modes: Group 3 Fax, Data, IS-101 Voice, V. 42/MNP 2­4 (Microcom Networking Protocol Classes 2 through 4), Error correction, V. 44, V. 42 bis/MNP 5 (Microcom Networking Protocol Class 5), and Videoconferencing. The data rates and modulation schemes for Data and Fax modes are presented in Table 15 on page 25. Additionally, special modes of operation exist for power management and loopback testing. 7. 1 7. 1. 1 Modes Data Mode In data mode, the 536EPXX chipsets send at an effective rate of 33. 6 kbps and receive at 53. 333 kbps using ITU-V. 92. This option ensures compatibility with host-based H. 324 videoconferencing application software. The 536EPXX chipsets support both transparent and framed submodes of the V. 80 synchronous access mode, plus Voice Call First and full-duplex speakerphone. 7. 1. 6 Loopback Test Modes In all modes except V. 92, modem-to-DTE and modem-to-modem communication integrity can be tested with loopback tests. The AT&T1 command initiates the local analog loopback test. 7. 2 7. 2. 1 Other Features Full-Duplex Speakerphone The 536EPXX supports full-duplex speakerphone with internal adaptive echo cancellation. Phone users can talk simultaneously without the remote user hearing an echo. 7. 2. 2 Transmit Levels The factory default transmit level for V. 92 and V. 34 transmission is -10 dBm ±1 dB at Tip and Ring. The transmit level can be programmed using the international configuration utility. Important: Current download speeds are limited to 53. 33 kbps due to FCC rules that restrict modem power output. 7. 2. 3 Transmit Tone Levels The modem generates DTMF, answer, call, and guard tones. The specifications for each tone are provided in Table 13 and Table 14 on page 24. [. . . ] Initiated activity such as bus mastering and functional interrupt request generation occur only after the function has been restored to active state. 28 Intel Confidential PreliminaryDatasheet Host Accelerated Modem 56K V. 92 Chipset -- 536EPXX Important: A minimum recovery time of 200µs from D2 to D0 is required before the next function can be accessed. Attempted access sooner than this could result in undefined system behavior. 8. 3. 3 D3cold Switching from main supply outputs to the auxiliary power source requires strict power budgeting of slots, determining those to consume full 3. 3Vaux power. A PCI function must draw no more than 20 mA through the 3. 3Vaux pin when in D3cold if the PME_En bit is cleared. If a PCI function has been enabled for PME# generation before entering D3cold, the PCI add-in card can continue to draw up to 375 mA through the 3. 3Vaux pin while in D3cold. 8. 3. 4 Speaker Interface The AFE device internally implements both the volume control and amplifier necessary to drive an external speaker. [. . . ]