User manual DFI CA64-TC

[. . . ] A+ System Board Users Manual 49800120 Copyright This publication contains information that is protected by copyright. No part of it may be reproduced in any form or by any means or used to make any transformation/adaptation without the prior written permission from the copyright holders. The manufacturer makes no representations or warranties with respect to the contents or use of this manual and specifically disclaims any express or implied warranties of merchantability or fitness for any particular purpose. The user will assume the entire risk of the use or the results of the use of this document. [. . . ] The default settings have been chosen because they provide the best operating conditions for your system. The only time you might consider making any changes would be if you discovered some incompatibility or that data was being lost while using your system. DRAM Timing This field is used to select the timing of the DRAMs installed on the system board. SDRAM Cycle Length This field is used to set the clock cycle for the CAS latency. 54 Award BIOS Setup Utility DRAM Clock Sets the memory clock speed equal to that of the CPU clock speed. HCLK-33M The memory clock speed is equal to CPU clock speed minus 33MHz. Memory Hole This field is used to select the memory area that must not be addressed to the ISA bus. P2C/C2P Concurrency When enabled, the PCI/AGP master to CPU cycle will be concurrent whenever the Host CPU is performing R/W access to the PCI or slave devices. Fast R-W Turn Around When enabled, the turn around time of a memory read followed by a memory write is reduced. AGP Aperture Size This field is relevant to the memory-mapped graphics data of the AGP card installed in your system. AGP-4X Mode This field is used to enable the AGP 4x interface which transfers video data at 1066MB/sec. Enable this field only if your graphics card supports the AGP 4x mode. AGP Fast Write This function is supported only if this field is set to Enabled. Host CLK ! 55 ! Award BIOS Setup Utility OnChip USB This field is used to enable or disable the onboard USB controller supported by the chipset. If you are using a USB peripheral device, make sure to set this field to Enabled. However, if you are using a USB keyboard under DOS, make sure to enable this function. CPU to PCI Write Buffer Writes from the CPU to the PCI bus are buffered to offset the speed difference between the CPU and PCI bus. Disabled Writes are not buffered therefore the CPU must wait until the write cycle is complete before starting another write cycle. PCI Dynamic Bursting When enabled, every write transaction goes to the write buffer. PCI Master 0 WS Write When enabled, writes to the PCI bus are executed with zero wait state. PCI Delay Transaction When enabled, this function frees up the PCI bus for other PCI masters during the PCI-to-ISA transactions. This allows PCI and ISA buses to be used more efficiently and prevents degradation of performance on the PCI bus when ISA accesses are made. PCI#2 Access #1 Retry Set this field to Enabled if you want to rotate the priority of the PCI masters. [. . . ] Inspect the cord and install a new one if necessary. Floppy Drive The computer cannot access the floppy drive. Check the path statement to make sure you are writing to the targeted drive. Use another diskette with adequate storage space. 91 + Troubleshooting Hard Drive Hard disk failure. Make sure the correct drive type for the hard disk drive has been entered in the BIOS. [. . . ]