User manual CADENCE DESIGN SYSTEMS VIRTUOSO LAYOUT SUITE GXL DATASHEET

[. . . ] Virtuoso Layout Suite GXL is built on the fully featured connectivity- and constraint-driven environment, which is at the core of the Virtuoso platform. These technologies are the fundamental building blocks for generating first-time correct and optimal silicon. · High-performanceconnectivity-driven binder is ideal for designs that have schematic-to-layout name mismatches · CanbeVirtuosoSchematicEditordriven or netlist-driven · Modern, redesigned, commonuser interface focuses on ease-of-use and intuitive layout · Easescreationandnavigationof complex designs with unlimited hierarchy support coupled with a multi-window, multi-tabbed editing environment · OffersinteractivePick-From-Schematic or automated Gen-From-Source device generation · AutomatesSKILLPcell-baseddevice editing including abutment, pin permutation, folding, chaining, and cloning · Accelerateslayoutentrywitheasyto-use and easily accessed editing functions · Assistedwireeditingfunctionality targets designer productivity when creating custom interconnect · Offersamenu-drivenorprogrammable Multi-Part Path (MPP) feature for guardrings and slotting · Advancedcloningcapabilitiesenable generation and editing of complex repeated layout patterns · Dockedassistantsaroundthelayout canvas enable a more efficient use model and optimal use of display real estate · Parameterizedcells(Pcells)dramatically improve performance and third-party interoperability · OpenAccessdatabasehandleslarge designs with high performance and efficiency · Configurablephysicalhierarchy browser enables easy configuration and visualization of large, complex designs VIRTUOSO LAYOUT SUITE The Virtuoso Layout Suite comprises three tiers of increasing layout automation and designer productivity. Virtuoso Layout Suite L is the basic design creation and implementation environment. Virtuoso Layout Suite XL is an extension to the L configuration, designed with layout productivity as its focus. [. . . ] When users create a MoDGEN from the schematic, a MoDGEN constraint is inserted in the Virtuoso common constraint environment. This constraint is then enforced automatically when the layout is created. Layout Migrate provides hierarchical, two-dimensional optimization algorithms to achieve significantly higher quality of results than traditional methods using near-linear shrinks. process nodes along with an array of custom specialty routing types, such as bus/bundle differential pair, matched length, and symmetric. users can drive the wire editor fully manually, or they can take advantage of the wire editor's assisted capabilities. Commands such as point-to-point, finish wire, pushing and shoving of wires, and guided routing are built on the Virtuoso common constraint system and connectivity-driven layout flow. These features boost productivity for almost all layout engineers, freeing them from generating complicated scripts to achieve desired results. FULL CUSTOM-ANALOG AND CUSTOM-DIGITAL PLACEMENT The Virtuoso analog placer supports a number of analog/rF-centric automatic placement functions. This includes the automatic creation of quick placements and more robust placements that support more packing, as well as functions to fix DrC errors in the placement and adjust cell pins and sides. The Virtuoso analog placer offers three modes of operation: · Quickplacementmode, whichprovides fast, DrC-aware placement for quick area estimation · Quickplacementasschematicmode, which provides a placement-based device ordering in the schematic · Fullyautomatedplacement, which provides user-definable effort levels The Virtuoso custom-digital placer automatically places transistors, devices, and cells in block- and cell-based designs using more traditional row-based methods. This placer is interoperable with the analog placer and preserves MoDGENs and user-defined groups. CONNECTIVITY-DRIVEN CAPABILITIES AND FLOw Driven by a schematic connectivity source using Virtuoso Schematic Editor or a netlist source such as CDL or SPiCE, Virtuoso Layout Suite GXL generates an LVS-correct layout in real time to promote correct-by-construction layout, improved productivity, and shorter verification time. Tedious design tasks can be automated, such as device generation, placement, and routing. Schematic and layout can be cross-probed to highlight instances and devices and identify unconnected nets quickly. The connectivity-driven binder enables better support of legacy layouts that have name mismatches, and also improves handling of ECos that involve renaming instances and terminals in the layout. The incremental nature of the connectivity binder also greatly improves the performance of the connectivitydriven layout flow. ADVANCED EDITING wITh CLONING Virtuoso Layout Suite GXL has a unique capability that allows users to "clone" portions of the layout without disrupting or violating connectivity. What differentiates cloning from a more traditional copy of geometry is that cloning supports both a geometric copy and a connectivity update. This capability is essential in today's connectivity-driven methodologies. in addition to cloning, users can synchronously clone portions of the layout so that a single change in a member of a clone group updates all partner clones. This capability is a huge productivity enabler when working in a connectivitydriven environment. CONSTRAINT- AND DESIGN-RULE­ DRIVEN FUNCTIONS Topological constraints, electrical constraints, and/ordesign-rule­specific constraints can be specified and managed in Virtuoso Schematic Editor, Virtuoso Analog Design environment, or Virtuoso Layout Suite GXL. Simply set the constraints in Virtuoso Schematic Editor GXL and Virtuoso Layout Suite GXL can easily be configured to either enforce the constraints while generating a layout or automatically flag and log constraint violations that can be discussed during subsequent design reviews. YIELD OPTIMIzATION The Virtuoso yield optimizer is used for design-for-yield optimization, based on the enforcement of recommended rules where possible, This capability maintains all hierarchy, mandatory design rules, and design constraints such as symmetry and design-rule overrides. Being able to concentrate on a specific section of layout, while still having the full layout context available, decreases the need for repetitive panning and zooming. This translates into fewer mouse clicks, which improves layout productivity. FLEXIBLE PCELLS Parameterized cells (Pcells) provide an advanced level of design automation to minimize tedious and repetitive layout tasks. Pcells support the changing of the size, shape, or contents of each cell instance without changing the original cell. [. . . ] The Search Assistant provides layout engineers with comprehensive search capabilities. it categorizes the "found" items into logical groups (cells, pin names, properties, etc. ) and displays these items in a tree structure, making it easy for users to find and access information within the design, design DESIGN-RULE­DRIVEN EDITING Virtuoso Layout Suite GXL provides realtimedesign-rule­driveneditingthat flags rule violations or automatically enforces design-rule correct layout. This enables correct-by-construction layout, improving productivity and reducing physical verification iterations. Advancednode design rules, including many rules associated with 40- and 32-nanometer processes, are supported. AUTOMATED MENU-DRIVEN DEVICE GENERATION wITh QCELLS Figure 4: Docked layout assistants include a Design Navigator, Property Editor, and World View, which enhance layout productivity Virtuoso Layout Suite GXL accelerates the creation and editing of devices withtheQuickCell(Qcell)menu-driven www. cadence. com VirTuoSo LAyouT SuiTE GXL 5 parameterized cell (Pcell) feature. [. . . ]